Bipolar transistors are used as electrostatic discharge (ESD) protection devices for discharging a protected node in an integrated circuit during an ESD event. Vertical NPN bipolar transistors are sometimes used as protection devices in mixed signal or digital circuits to provide a desired voltage breakdown level using fabrication processes tailored for low voltage CMOS transistors. However, vertical NPN transistors suffer from competing lateral and vertical p-n junction breakdown behavior, which can lead to non-uniformity in current conduction manifested in longer pulses and more prominent ESD stress to a protected node. Islanded internally stacked NPN ESD protection devices include two or more series connected vertical transistors which can be used to provide enhanced control of breakdown voltage characteristics, but these devices occupy significant circuit board area compared to single NPN structures.